发明名称 |
Reducing stress in integrated circuits |
摘要 |
A semiconductor chip in which stress on the effective stress on the substrate is reduced in order to reduce bowing. To reduce the effective stress, a stress compensation layer is provided on the backside of the chip. The stress compensating layer produces a stress opposite of that produced by the IC. Thus the overall or effective stress on the substrate is reduced. |
申请公布号 |
US6815234(B2) |
申请公布日期 |
2004.11.09 |
申请号 |
US20020248253 |
申请日期 |
2002.12.31 |
申请人 |
INFINEON TECHNOLOGIES AKTIENGESELLSCHAFT |
发明人 |
WELLHAUSEN UWE;GERNHARDT STEFAN;BRUCHHAUS RAINER;HILLIGER ANDREAS;LIAN JING YU;NAGEL NICOLAS |
分类号 |
H01L21/8246;H01L23/00;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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