发明名称 |
Method of manufacturing semiconductor devices |
摘要 |
Subjected to obtain a crystalline TFT which simultaneously prevents increase of OFF current and deterioration of ON current. A gate electrode of a crystalline TFT is comprised of a first gate electrode and a second gate electrode formed in contact with the first gate electrode and a gate insulating film. LDD region is formed by using the first gate electrode as a mask, and a source region and a drain region are formed by using the second gate electrode as a mask. By removing a portion of the second gate electrode, a structure in which a region where LDD region and the second gate electrode overlap with a gate insulating film interposed therebetween, and a region where LDD region and the second gate electrode do not overlap, is obtained.
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申请公布号 |
US6815273(B2) |
申请公布日期 |
2004.11.09 |
申请号 |
US20020292830 |
申请日期 |
2002.11.12 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
NAKAJIMA SETSUO;OHTANI HISASHI;YAMAZAKI SHUNPEI |
分类号 |
G02B27/00;G02B27/01;G02F1/1362;H01L21/336;H01L21/77;H01L21/84;H01L29/423;H01L29/786;(IPC1-7):H01L21/00 |
主分类号 |
G02B27/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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