发明名称
摘要 A reclocker circuit and router cell are provided that are particularly useful when configured into a router matrix comprising a plurality of interconnected router cells. The reclocker circuit includes an integral N-to-1 multiplexer (MUX), wherein N is at least three. The improved router cell includes the reclocker/MUX circuit, a switch, and a fan-out circuit. A plurality of ports are coupled to the router cell circuitry, including an input port, an output port, a plurality of expansion input ports, and a plurality of expansion output ports. The improved router cell couples either the input port or one the expansion input ports to its output port, and it also couples the input port to each of the expansion output ports. By using the improved router cells in the design of a router matrix, jitter induced by the reclocker circuits is minimized. <IMAGE>
申请公布号 JP3585878(B2) 申请公布日期 2004.11.04
申请号 JP20010319878 申请日期 2001.10.17
申请人 发明人
分类号 H03K17/00;H04L7/00;H04L7/02;H04L12/56;H04N5/268;H04Q3/52;H04Q3/66 主分类号 H03K17/00
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