发明名称 CIRCUITS AND METHODS FOR FAST-SETTLING SIGNAL ALIGNMENT AND DC OFFSET REMOVAL
摘要 Fast settling circuits and methods designed to align input signal amplitude level and to remove DC offset voltages with minimal loss of low frequency signal in receiving analog circuits are disclosed. With the key innovative circuits and methods for signal peak alignment, the disclosed circuits and methods achieve fast settling without significant attenuation of the input signal. Peak aligning circuits and methods can be implemented along with conventional RC AC coupling circuits. In applying the aligning circuits and methods to differential signal pair, DC offsets can be easily removed.
申请公布号 US2004217797(A1) 申请公布日期 2004.11.04
申请号 US20030428444 申请日期 2003.05.01
申请人 CAO KANYU;FAN YIPING;LI HONGYU;CHAO CHIEH-YUAN 发明人 CAO KANYU;FAN YIPING;LI HONGYU;CHAO CHIEH-YUAN
分类号 H03L5/00;H04L25/02;H04Q;(IPC1-7):H03L5/00 主分类号 H03L5/00
代理机构 代理人
主权项
地址