| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of manufacturing a NAND flash memory element which can reduce the aspect ratio of the drain contact hole while reducing the resistance of a common source line. SOLUTION: The method of manufacturing the NAND flash memory element comprises a step of preparing a semiconductor substrate in which a plurality of element isolation films are formed, and source selective transistors, a plurality of memory cells and drain selective transistors are formed in a cell region while peripheral transistors are formed in a peripheral circuit region, a step of forming a first interlayer insulating film, a step of etching the first interlayer insulating film to expose cell source regions 33S and the element isolating films between the cell source regions, and forming a common source line contact hole which exposes the semiconductor substrate 31 when the exposed element isolating films are etched, a step of forming ion-implanted regions 37 in the bottom face of the common source line contact hole by ion implantation, and a step of forming a common source line CSL by filling a conductive material in the common source line contact hole. COPYRIGHT: (C)2005,JPO&NCIPI
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