发明名称 |
VARIABLE RATE SIGMA DELTA MODULATOR |
摘要 |
A sigma delta circuit is provided having a sigma delta modulator configured to operate according to a first clock signal and a quantizer connected to the sigma delta modulator, where the quantizer is configured to operate according to a second clock signal. In operation, if a small amplitude signal is received by the sigma delta circuit, the circuit is configured to operate at a fixed output frequency. When a large amplitude signal is received, the circuit is configured to adjust to a different frequency to accommodate the larger signal. The second clock signal may be a variable clock signal, where the quantizer operates according to a variable clock signal in order to adjust to different input signals. |
申请公布号 |
WO2004095704(A2) |
申请公布日期 |
2004.11.04 |
申请号 |
WO2003US38911 |
申请日期 |
2003.12.08 |
申请人 |
ESS TECHNOLOGY, INC.;MALLINSON, ANDREW, MARTIN |
发明人 |
MALLINSON, ANDREW, MARTIN |
分类号 |
H03M3/02 |
主分类号 |
H03M3/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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