| 摘要 |
<p>A limiter circuit includes a rectification circuit coupled to an input of the limiter circuit. The rectification circuit produces a voltage having a predetermined average level. The level is a function of an input signal fed to the input of the limiter circuit. A voltage divider circuit is coupled to the rectification circuit for producing an output voltage having a level proportional to the input signal. An enhancement mode field effect transistor has a gate electrode fed by the output voltage produced by the voltage divider circuit. The transistor has drain and source electrodes coupled to an output of the limiter circuit and a reference potential, respectively. A transmission line is coupled between the input of the limiter and the output of the limiter circuit. The transmission line has an electrical length nlambda/4, where lambda is the nominal operating wavelength of the limiter circuit and n is an odd integer. The use of an enhancement mode transistor with a positive gate threshold for conduction, greatly simplifies the limiter circuit compared with conventional designs using depletion mode transistors.</p> |
