发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which enables a semiconductor substrate to be reduced in area by utilizing the parasitic capacitance in the semiconductor region where a memory cell array is formed as a stabilizing capacitor used for controlling and making the output potential of a step-up circuit constant. <P>SOLUTION: The semiconductor memory device is composed of a p-type semiconductor substrate 19; a step-up potential control unit 11 which is formed on the p-type semiconductor substrate 19, steps up a potential supplied from outside, and outputs a stepped-up potential; an n-type well region 20 which is formed on the semiconductor substrate 19 and where the stepped-up potential is applied from the step-up potential control unit 11; a p-type well region 21 formed on the n-type well region 20; and a memory cell MC formed on the p-type well region 21. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2004311525(A) 申请公布日期 2004.11.04
申请号 JP20030099513 申请日期 2003.04.02
申请人 TOSHIBA CORP 发明人 HIRATA YOSHIHARU
分类号 G11C16/06;G11C16/04;H01L21/822;H01L21/8247;H01L27/04;H01L27/10;H01L27/115;(IPC1-7):H01L27/10;H01L21/824 主分类号 G11C16/06
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