发明名称 CIRCUIT FOR GENERATING BIAS VOLTAGE, AND AMPLIFIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a circuit for generating bias voltage and an amplifier circuit enabling reduction of power consumption, in a circuit for applying a bias voltage. SOLUTION: A first bias voltage generator 70, applying the bias voltage to the amplifier circuit of an AD converter, includes a driver 80 and a controller 88. The driver 80 includes a first bias circuit 82 and a second bias circuit 84, as a plurality of bias circuits connected in parallel, having different current drive capabilities. The first bias circuit 82 and the second bias circuit 84 respectively include CMOS transistors connected directly between a power supply potential VDD and a ground potential VSS, and switching elements for cutting off the through-current. The bias voltage is output from each drain of the CMOS transistors. The controller 88 controls the overall current drive capability of the driver 80, by switching both or either the first bias circuit 82 or the second bias circuit 84. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004312705(A) 申请公布日期 2004.11.04
申请号 JP20040060507 申请日期 2004.03.04
申请人 SANYO ELECTRIC CO LTD 发明人 TANI KUNIYUKI;WADA ATSUSHI
分类号 H03F3/34;G11C5/14;H03F3/42;(IPC1-7):H03F3/34 主分类号 H03F3/34
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