VOLTAGE DISCHARGE CIRCUIT INCLUDING A CIRCUIT CONTROLLING DISCHARGE OF INTERNAL VOLTAGE ON ENTERING A DPD MODE

摘要

PURPOSE: A voltage discharge circuit is provided to prevent the low power consumption and the degradation of a transistor while canceling a DPD(Deep Power Down) mode. CONSTITUTION: A VPP generator(411) generates a high voltage(VPP) used as a gate voltage of a memory cell transistor by receiving an external power supply voltage(VDD). The first switch(412) switches the voltage of the VPP generator according to the activation/deactivation of a DPD mode signal. A VPP power supply operation circuit(413) receives the high voltage from the first switch. A VPERI generator(421) generates a peripheral voltage(VPERI) used as a voltage of an internal circuit except a memory cell by receiving the external power supply voltage. The second switch(422) switches the voltage of the VPERI generator according to the activation/deactivation of the PDP mode signal. A VPERI power supply operation circuit(423) receives the peripheral voltage from the second switch. A VCORE generator(431) generates a core voltage(VCORE) used as a voltage of a memory cell array circuit by receiving the external power supply voltage. The third switch(432) switches the voltage of the VCORE generator according to the activation/deactivation of the DPD mode signal. A VCORE power supply operation circuit receives the core voltage from the third switch. A VCP generator(441) generates a capacitor voltage(VCP) used as a capacitor node voltage of the memory cell by receiving the external power supply voltage. The fourth switch(442) switches the voltage of the VCP generator according to the activation/deactivation of the DPD mode signal. A VCP power supply operation circuit receives the capacitor voltage from the fourth switch. A memory cell(450) stores data by referring to the high voltage and the core voltage and the capacitor voltage. And a peripheral circuit(460) is driven by referring to the peripheral voltage.