发明名称 METHOD FOR EXECUTING INSTRUCTIONS BY MICROPROCESSOR, COMPILER, AND MULTIPROCESSOR DATA PROCESSING SYSTEM USING CACHE MEMORY SUBSYSTEM
摘要 PURPOSE: A method for executing instructions by a microprocessor, a compiler, and a multiprocessor data processing system using a cache memory subsystem are provided to enable an OS(Operating System), a programmer, and/or a processor to control/identify/invalidate a selected cache line without occurring error for potential timing and coherency generated in a multiprocessor environment. CONSTITUTION: An address is judged by a microprocessor. It is judged that a cache block matched with the address is present in the cache memory unit localized to the microprocessor(134). Responding that the cache block matched with the address is present, the cache block in a local cache memory unit is invalidated(140). Responding that the cache block matched with the address is present in a remote cache memory unit, the cache block matched with the address is kept in a valid state.
申请公布号 KR20040092394(A) 申请公布日期 2004.11.03
申请号 KR20040019565 申请日期 2004.03.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MCCALPIN JOHN DAVID;SINHAROY BALARAM;WILLIAMS DEREK EDWARD;WRIGHT KENNETH LEE
分类号 G06F9/30;G06F9/45;G06F12/08;G06F15/177;(IPC1-7):G06F12/08 主分类号 G06F9/30
代理机构 代理人
主权项
地址