| 摘要 |
A DLL circuit includes: an output dummy circuit having a prescribed propagation delay; a first delay element delaying a reference clock in accordance with a control signal and supplying the delayed signal to the output dummy circuit; a phase determination circuit comparing the phases of the reference clock and a feedback signal and supplying a control signal altering the delay amount of the first delay element; a second delay element receiving either the reference clock or the feedback signal, to serve as the trigger of the phase comparison operation, and delaying this signal by a delay amount; and a latch circuit latching the other signal not serving as the trigger of the phase comparison operation in synchronization with the rising edge of the output signal of the second delay element and supplying a signal turning on or off the input of the other signal to the phase determination circuit.
|
