发明名称 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
摘要 A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so that the web-like lead frame, which is solid and flat on the other side is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is encapsulated. The resultant package being electrically isolated enables strip testing and reliable singulation without having to cut into any additional metal.
申请公布号 US6812552(B2) 申请公布日期 2004.11.02
申请号 US20020134882 申请日期 2002.04.29
申请人 ADVANCED INTERCONNECT TECHNOLOGIES LIMITED 发明人 ISLAM SHAFIDUL;SAN ANTONIO ROMARICO SANTOS
分类号 H01L21/44;H01L21/48;H01L21/56;H01L23/31;H01L23/495;(IPC1-7):H01L23/495 主分类号 H01L21/44
代理机构 代理人
主权项
地址