发明名称 System and method of evaluating gate oxide integrity for semiconductor microchips
摘要 The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a layer of gate oxide on the semiconductor wafer; a layer of polysilicon on the gate oxide; an electron beam microscope with adjustable energy levels, wherein the electron beam is directed at the semiconductor wafer; an electron beam inspection tool used to detect passive voltage contrasts within the gate oxide layer. The system may also include a measuring tool for measuring an electrical current level of the semiconductor substrate. The system may also include an electrical ground connected to the semiconductor wafer. The system may also include the energy levels vary from about 600 eV to 5000 eV.
申请公布号 US6812050(B1) 申请公布日期 2004.11.02
申请号 US20030463022 申请日期 2003.06.13
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 RAMAPPA DEEPAK A.
分类号 G01N23/06;(IPC1-7):H01L21/00;G01N27/60 主分类号 G01N23/06
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