PROCESS FOR FORMING DUAL METAL GATE STRUCTURES

摘要

A semiconductor device (10) has a P channel (38) gate stack comprising a first metal type (18) and a second metal type (20) over the first metal type (18) and an N channel (40) gate stack comprising the second metal type (18) in direct contact with the a gate dielectric (14). The N channel (40) gate stack and a portion of the P channel (38) gate stack are etched by a dry etch. The etch of the P channel (38) gate stack is completed with a wet etch. The wet etch is very selective to the gate dielectric (14) and to the second metal type (18) so that the N channel transistor is not adversely effected by completing the etch of the P channel (38) gate stack.