发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device provided with a diagnostic circuit which does not deteriorate logic element delay at the time of normal operation. SOLUTION: In a latch circuit provided on the input side of an output part or a logical step of a memory circuit, a signal selection circuit is provided in a feed back loop of the latch circuit and the signal selection circuit is switched correspondingly to operation modes. A return signal is transmitted in the normal operation and a test signal is transmitted at the time of test operation to prevent an increase of delay due to the signal selection circuit in a main path in the normal operation. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2004303287(A) |
申请公布日期 |
2004.10.28 |
申请号 |
JP20030091518 |
申请日期 |
2003.03.28 |
申请人 |
HITACHI LTD |
发明人 |
FUKUOKA TETSUYA;YAMAGISHI MIKIO |
分类号 |
G01R31/28;G01R31/3185;G11C11/401;G11C11/413;G11C29/14;G11C29/46;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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