| 摘要 |
A DLL circuit synchronizes an external input clock applied from an outside of a system with an internal input clock used inside the system using a divider unit. The DLL circuit includes a detection unit for detecting whether a pulse width of the external input clock is narrower than a reference set value. The divider unit outputs a first divided signal if it is detected that the pulse width of the external input clock is wider than the reference set value, and outputs a second divided signal if it is detected that the pulse width of the external input clock is shorter than the reference set value. The DLL circuit can normally operate even if the period of the external input clock is short.
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