PROCESSOR HAVING REGISTER RENAMING FUNCTION

摘要

PROBLEM TO BE SOLVED: To enable a complicated control such as out-of-order execution even if the number of logical registers referable on a program is increased. SOLUTION: This processor comprises a command decode part 2 for decoding a command code from a command fetched by a command fetch part 1; a register body 4 for retaining data of a register number shown by the decoded command code; and a caching register 3 for caching a part of the retained data. Further, this processor comprises an internal command information retention part 6 for retaining information of an internal command state including a logical register number or caching register number retained in the caching register 3 according to the command from the fetch part 1; a command insertion determination part 8 for comparing the command code obtained by predecoding the command from the fetch part 1 with information of the internal command retained in the retention part 6 to determine whether or not the internal command is inserted; and a register transfer command issuing part 9 for issuing, when the determination part 8 determines insertion of an internal transfer command, the register transfer command of internal data between the caching register 3 and the register body 4. COPYRIGHT: (C)2005,JPO&NCIPI