发明名称 METHOD FOR FABRICATING PIN SEMICONDUCTOR DETECTOR ON THE LOW RESISTIVITY SILICON SUBSTRATE USING PARAMETERS OBTAINED THROUGH SIMULATION
摘要 PURPOSE: A method for fabricating a PIN semiconductor detector on a low resistivity silicon substrate is provided to improve performance of the low resistivity silicon substrate by using parameters obtained through a simulation. CONSTITUTION: Experimentation values of a doped density of a p+ layer of a PIN semiconductor detector, re-distribution of impurities through a heating treatment, and a guard-ring effect of a cutting surface are detected through a simulation. Optimal parameters and the structure of a PIN semiconductor detector are determined according to the experimental values. The PIN semiconductor detector is fabricated by using the optical parameters. A DAVINCH program is used for the simulation. A TSUPREM-IV program for analyzing parameters obtained through a semiconductor fabricating process is used in order to determine the optimal parameters from the experimental values.
申请公布号 KR20040091257(A) 申请公布日期 2004.10.28
申请号 KR20030025025 申请日期 2003.04.21
申请人 KOREA ATOMIC ENERGY RESEARCH INSTITUTE;KOREA HYDRO & NUCLEAR POWER CO., LTD.;SANS FRONTIER TECHNOLOGY 发明人 CHAE, HYEON SIK;JANG, SI YEONG;KANG, BYEONG WI;LEE, BONG JAE
分类号 G01T1/24;(IPC1-7):G01T1/24 主分类号 G01T1/24
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