High-performance electrostatic clamp comprising a resistive layer, micro-grooves, and dielectric layer

摘要

An electrostatic clamp for securing a semiconductor wafer during processing. The electrostatic clamp comprises a base member, a resistive layer, a dielectric layer including a gas pressure distribution micro-groove network, a gas gap positioned between a backside of a semiconductor wafer and the dielectric layer, and a pair of high voltage electrodes positioned between the resistive layer and the dielectric layer. The electrostatic clamp can further comprise at least one ground electrode positioned between the resistive layer and the dielectric layer that provides shielding for the gas pressure distribution micro-groove network. The electrostatic clamp is characterized by a heat transfer coefficient of greater than or about 200 mW/Kcm<2>, a response time of less than or about 1 second, and gas leakage of less than or about 0.5 sccm. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR §1.72(b).