发明名称 |
METHOD FOR PRODUCING BIT LINES FOR UCP FLASH MEMORIES |
摘要 |
The invention relates to a method for producing bit lines for UCP flash memories comprising a floating gate arrangement arranged on a substrate and an insulation arranged in the substrate under the floating gate arrangement. Initially, the floating gate is produced, after photolithography, by etching a separated polysilicon layer deposited on the total surface of the substrate. The aim of the invention is to provide a method wherein cell size can be reduced without significantly increasing production costs and wherein the bit lines survive the temperature budget of the sequence process without being damaged. As a result, the bit line (13), embodied as a buried bit line made of a temperature resistant material, is arranged in a silicon substrate (2) or in the insulation (3) of the active area below the floating gate (1) by automatic adjustment therewith (2). The already structured floating gate (1) is used as an etching mask for producing, by etching in insulation (3), a trench (6) which is subsequently filled with a low impedance material. |
申请公布号 |
WO2004068578(A3) |
申请公布日期 |
2004.10.28 |
申请号 |
WO2004DE00042 |
申请日期 |
2004.01.15 |
申请人 |
INFINEON TECHNOLOGIES AG;GRATZ, ACHIM;POLEI, VERONIKA;ROEHRICH, MAYK |
发明人 |
GRATZ, ACHIM;POLEI, VERONIKA |
分类号 |
H01L21/336;H01L21/8247;H01L27/115;H01L29/788 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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