发明名称 Scheduling circuitry and methods
摘要 Scheduling circuitry, for use for example in an ATM network unit to schedule cell transmissions, includes a master calendar (1) for holding entries corresponding respectively to events (cell transmissions) that are to occur within a preselected master-calendar scheduling range (SR), and a slave calendar (12) for holding entries corresponding respectively to events that are to occur beyond that scheduling range. When an event is to be scheduled, calendar control circuitry (24) makes an entry corresponding thereto in the slave calendar (12) if the interval between a current time and a desired scheduling time for the event exceeds said scheduling range. The entry in the slave calendar includes timing information representing the desired scheduling time. The calendar control circuitry monitors the entries in the slave calendar (12) and causes an entry therein whose corresponding event becomes within the scheduling range to be transferred to the master calendar (1).Such scheduling circuitry can deal effectively with events that are to be scheduled at widely disparate intervals (very short and very long) without requiring the calendars to be large and without complicated processing of the calendar entries.
申请公布号 US6810043(B1) 申请公布日期 2004.10.26
申请号 US19990304843 申请日期 1999.05.05
申请人 FUJITSU LTD 发明人 NAVEN FINBAR;BARNES PAUL;SMITH SIMON TIMOTHY
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04L12/56;H04L12/54 主分类号 H04L12/56
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