Manufacturing method of semiconductor device

摘要

In a capacitor formation area A1, a capacitor C1 is formed. The capacitor is constituted by a lower-layer electrode-use polysilicon layer 105 (lower-layer electrode) formed on a LOCOS separation film 101, a nitride film 106 (dielectric film) and an upper-layer electrode-use polysilicon layer 107 (upper-layer electrode). In this case, the lower-layer electrode-use polysilicon layer 105 and the nitride film 106 are formed as the same plane pattern. In CMOS formation area A2, an NMOS transistor Q11 is formed on a P-well region 102 and a PMOS transistor Q12 is formed in an N-well region 103. Both of the gate electrodes of NMOS transistor Q11 and NMOS transistor Q21 are formed by the upper-layer electrode-use polysilicon layer 107.