发明名称 Ultra-thin gate dielectrics
摘要 An in-situ ultra dilute ammonia nitridation process and apparatus of the following ultra-thin chemically tailored gate dielectrics: DCE/O2 (Trans 1,2-Dichloroethylene) based ultra-thin gate dielectric; Nitric Oxide (NO) based ultra-thin gate dielectric that has been re-oxidized via a DCE/O2 (Trans 1,2-Dichloroethylene) process; "dry-wet" DCE (Trans 1,2-Dichloroethylene)/O2-H2O/O2) based ultra-thin gate dielectric; and ultra dilute, less than 1E-7 moles NH3/mm<2>, nitridation of an ultra-thin gate dielectric. A vertical diffusion furnace (VDF) is provided to process the same. The ultra-thin chemically tailored gate dielectrics generated in a VDF with ultra-dilute NH3, below 1E-7 moles NH3/mm<2>, in-situ nitridation show a performance comparable or better to traditional ex-situ rapid thermal anneal (RTA) processing techniques for 90 nm CMOS technology. These methods replace and remove at least one process layer in the fabrication of CMOS devices using traditional ex-situ RTA processing, decreasing production costs, and improving fabrication cycle time, with equivalent or improved transistor performance.
申请公布号 US6808993(B2) 申请公布日期 2004.10.26
申请号 US20030339783 申请日期 2003.01.08
申请人 INTEL CORPORATION 发明人 FINNIE CHRISTINE M.;JACOB PAULINE N.;LINDERT NICK;JACKSON KEITH M.;ALTHOFF KIRK;HWANG JACK;KAVALIEROS JACK;MUELLER JAMES R.
分类号 H01L21/28;H01L21/314;H01L21/318;H01L21/8238;H01L29/51;(IPC1-7):H01L21/336 主分类号 H01L21/28
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