| 摘要 |
A method of routing input signals in a programmable logic device (PLD) is disclosed. In a PLD having a PLD domain and a vector domain, input signals from the PLD domain are typically routed to the vector domain through an interface. The interface, however, often comprises a limited number of conductors and restricts the amount of data that can be directly transmitted to the vector domain. The disclosed method may be utilized to design an input switching unit that may use PLD-domain resources to route the input signals according to the time periods (or states) in which they operate. The input switching unit may comprise one or more multiplexers that are used to route the input signals in a time-multiplexed manner. As a result of the disclosed method, the amount of data that can be transmitted through the interface is maximized.
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