发明名称 Semiconductor memory device having full depletion type logic transistors and partial depletion type memory transistors
摘要 A simiconductor device includes a simiconductor substrate, an insulating layer, a silicon layer, full depletion type transistors, and partial deletion type transistors. The insulating layer is formed on the simiconductor substrate. The silicon layer has a first region and a second region. The silicon layer is formed on the insulating layer. The full depletion type transistors are used for a logical circuit and are formed on the silicon layer at the first region. The partial depletion type transistors are used for a memory cell circuit and are formed on the silicon layer at the second region. The second region of the silicon layer is maintained at a fixed potential.
申请公布号 US6809381(B2) 申请公布日期 2004.10.26
申请号 US20020059125 申请日期 2002.01.31
申请人 发明人
分类号 H01L21/762;H01L21/336;H01L21/76;H01L21/822;H01L21/8234;H01L21/8242;H01L21/84;H01L27/04;H01L27/08;H01L27/088;H01L27/108;H01L27/12;H01L29/786;(IPC1-7):H01L31/039 主分类号 H01L21/762
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