发明名称 |
PHASE CHANGE MEMORY DEVICE |
摘要 |
<p>A phase change memory device has a semiconductor substrate; a plurality of cell arrays stacked above the semiconductor substrate, each cell array having memory cells arranged in a matrix manner for storing resistance values as data that are determined by phase change of the memory cells, bit lines each commonly connecting one ends of plural memory cells arranged along a first direction of the matrix and word lines each commonly connecting the other ends of plural memory cells arranged along a second direction of the matrix; a read/write circuit formed on the semiconductor substrate as underlying the cell arrays for reading and writing data of the cell arrays; first and second vertical wirings disposed outside of first and second boundaries that define a cell layout region of the cell arrays in the first direction to connect the bit lines of the respective cell arrays to the read/write circuit; and third vertical wirings disposed outside of one of third and fourth boundaries that define the cell layout region in the second direction to connect the word lines of the respective cell arrays to the read/write circuit.</p> |
申请公布号 |
WO2004090984(A1) |
申请公布日期 |
2004.10.21 |
申请号 |
WO2003JP04275 |
申请日期 |
2003.04.03 |
申请人 |
KABUSHIKI KAISHA TOSHIBA;TODA, HARUKI |
发明人 |
TODA, HARUKI |
分类号 |
G11C7/18;G11C16/02;H01L27/24;(IPC1-7):H01L27/10;H01L45/00;G11C13/00 |
主分类号 |
G11C7/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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