发明名称 POWER SUPPLY WIRING METHOD AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To realize reduction of an area and enhancement of high integration in a semiconductor device. SOLUTION: A power supply wiring method is provided for a semiconductor device of a four-layer wiring structure in which the wiring direction of upper layer power supply wirings 3 and 4 in an uppermost wiring layer 24, and the wiring direction of lower layer power supply wirings 1 and 2 in a lowermost wiring layer 21, cross at right angle to each other. A wiring layer 22 which is arranged between the uppermost wiring layer 24 and the lowermost wiring layer 21 is selected at random, and at a position in the selected wiring layer 22 corresponding to the upper layer power supply wiring 4, a power supply line 8 is wired parallel to the upper layer power supply wiring 4. Then, contact parts 5, 6 and 7 are formed for connection between the power supply line 8, the upper layer power supply wiring 4, and the lower layer power supply wiring 2. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004296695(A) 申请公布日期 2004.10.21
申请号 JP20030085912 申请日期 2003.03.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SEKO KOICHI;NAGATA EIJI
分类号 H01L21/3205;H01L21/82;H01L23/52;(IPC1-7):H01L21/82;H01L21/320 主分类号 H01L21/3205
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