METHOD OF FORMING OVERLAY VERNIER TO RESTRAIN FAILURE OF MEASURING OVERLAY

摘要

PURPOSE: A method of forming an overlay vernier is provided to restrain failure of measuring overlay by preventing damage of a mother vernier due to an etching process using a mask for masking a scribe line including the mother vernier. CONSTITUTION: A trench-type cell isolation region is formed in a semiconductor substrate(200). A mother vernier(220a) is formed in the cell isolation region by using a high density plasma oxide layer. A gate material layer is formed on the entire surface of the resultant structure. A mask layer for masking a scribe line including the mother vernier is formed on the gate material layer. A gate is formed by removing selectively the gate material layer using the mask layer. A son vernier(250) is formed on the mother vernier.