发明名称 Slew rate controlled output buffer
摘要 An output buffer includes first and second circuit portions coupled between input and output terminals. Each circuit portion includes a capacitive element; an output transistor having a gate coupled to the capacitive element, and a drain that drives a voltage at the output terminal; and a current generator configured to generate a charging current that is directed to the capacitive element responsive to a logic transition at the input terminal, wherein the charging current causes a substantially linear ramp voltage to form at the gate of the output transistor, whereby the ramp voltage controls a slew rate of the output terminal voltage.
申请公布号 US2004207452(A1) 申请公布日期 2004.10.21
申请号 US20030413519 申请日期 2003.04.15
申请人 BROADCOM CORPORATION 发明人 VORENKAMP PIETER
分类号 H03K19/003;(IPC1-7):H03K17/16;H03K17/30 主分类号 H03K19/003
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