| 摘要 |
A vision processor includes a control section, a motion estimation section, and a discrete cosine transform ("DCT") section. The motion estimation section includes two memories, an image memory with two read ports and a write port, and a search memory with two read ports and a write port. The DCT section includes a DCT memory configurable as a two read, two write port memory and as a four read, four write port memory. The ports of these memories are selectively applied to various elements in the motion estimation path and the DCT path. In motion vector searching, the ALU performs averaging and difference operations on pixels in the frame and search memories. Data from the search memory is shifted for certain operations, before arithmetic operations in the ALU are performed. In DCT operations, transposition is done on word data read from the DCT memory in a shifter/transposer, which is shared with the motion estimation section, and the results written back to the DCT memory through the ALU operating in pass through mode. Multiply-accumulate operations are done in a multiplier-accumulator, which reads and writes-back to the DCT memory. Data transfers from the frame and search memories to the DCT memory may be performed in parallel with multiply-accumulate operations.
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