发明名称 |
PLL clock generator, optical disc drive and method for controlling PLL clock generator |
摘要 |
A PLL clock generator generates an output signal with a frequency N times (where N>=1) as high as that of an input signal. The clock generator includes: a frequency divider for dividing the frequency of a clock signal by N so as to output a frequency-divided clock signal; a phase comparator for detecting a phase difference between the input signal and the output signal of the frequency divider so as to output a phase difference signal including information representing the phase difference; a LPF for smoothing the phase difference signal; a VCO for generating the clock signal, of which the frequency is determined by the output of the LPF, and outputting the clock signal to the frequency divider; and a phase shifter for shifting the phase of the output signal of the frequency divider in accordance with the phase difference signal.
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申请公布号 |
US2004207475(A1) |
申请公布日期 |
2004.10.21 |
申请号 |
US20040824264 |
申请日期 |
2004.04.14 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
MINAMINO JUNICHI;NAKATA KOHEI |
分类号 |
H03L7/085;H03L7/089;(IPC1-7):H03L7/00 |
主分类号 |
H03L7/085 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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