发明名称 Method of manufacturing a vertical MOS transistor
摘要 The invention provide a vertical MOS transistor which is capable of realizing high reliability, low cost and high yield through the transistor is miniature and has a high driving ability, and a method of manufacturing the same. Up to the middle of a trench is filled with a polycrystalline silicon gate electrode, and an intermediate insulating film is deposited so as to be filled in a remaining portion of the trench to flatten a main surface of a semiconductor substrate. The intermediate insulating film is etched back to expose the main surface of the semiconductor substrate over which a metal material is in turn deposited. Thus, the vertical MOS transistor can be formed without through a contact hole formation process. Since a layout margin for alignment deviation or the like is unnecessary, area saving is possible. Also, since the metal material is perfectly flattened, high reliability is obtained.
申请公布号 US2004209425(A1) 申请公布日期 2004.10.21
申请号 US20040812443 申请日期 2004.03.30
申请人 HARADA HIROFUMI 发明人 HARADA HIROFUMI
分类号 H01L29/78;H01L21/336;H01L21/8238;H01L27/092;H01L29/423;(IPC1-7):H01L21/336 主分类号 H01L29/78
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