METHOD FOR SIMULTANEOUSLY FORMING BIT LINE CONTACT PLUGS OF CELL REGION AND PERI/CORE REGION

摘要

PURPOSE: A method for forming a contact plug of a bit line is provided to simplify process, to enhance process margin and to reduce costs by simultaneously forming bit line contact plugs of a cell region and a peri/core region. CONSTITUTION: The first interlayer dielectric is formed on gates of a cell and peri/core region formed on a substrate. Landing plug contact holes are formed by selectively etching the first interlayer dielectric. A polysilicon layer(109) is filled in the landing plug contact hole and planarized. The second interlayer dielectric(110) is formed on the resultant structure. By selectively etching the second interlayer dielectric, bit line contact holes are formed to expose the polysilicon layer of the cell and peri/core region. Bit line contact plugs are simultaneously formed in the bit line contact holes of the cell and peri/core region.