发明名称 |
INTEGRATED CIRCUIT DIE AND/OR PACKAGE HAVING A VARIABLE PITCH CONTACT ARRAY FOR MAXIMIZATION OF NUMBER OF SIGNAL LINES PER ROUTING LAYER. |
摘要 |
<p>An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.</p> |
申请公布号 |
MXPA01013012(A) |
申请公布日期 |
2004.10.15 |
申请号 |
MX2001PA13012 |
申请日期 |
2000.05.26 |
申请人 |
INTEL CORPORATION |
发明人 |
BHATTACHARYYA, BIDYUT, K. |
分类号 |
H05K3/34;H01L23/12;H01L23/498;H05K1/11;(IPC1-7):H01L23/498 |
主分类号 |
H05K3/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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