| 摘要 |
PURPOSE: A scramble circuit, a descramble circuit, and a data processing device and an IC card using the same are provided to scramble signals transferred on a bus, and prevent interpretation of original information on a memory, any data on the bus or the memory, and direct reading or rewriting of the data in order to protect the scrambled data. CONSTITUTION: The first scramble unit(231) outputs the first intermediate data of the same bit number by performing the first scramble process to the first data block(B1). The first operation unit(233) outputs the third data block(B1') by performing an XOR logical operation to each bit between the second data block(B0) and the first intermediate data. The second scramble unit(232) outputs the second intermediate data of the same bit number by performing the second scramble process same or similar to the first scramble process to the second data block. The second operation unit(234) outputs the fourth data block(B0') by performing the XOR logical operation to each bit between the first data block and the second intermediate data.
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