| 摘要 |
A computer system maintains and updates a status register (102, 107) in response to signals containing status information received from several peripheral devices (110, 120, 130), and generates an interrupt to a processor (100). When the processor (100) sevices the interrupt, the processor (100) merely reads the status register (102) to determine which peripheral device requires processing. This is a very fast operation because the status register (102) is internal to the processor (100) or core logic (103). No time consuming polling of peripheral devices (110, 120, 130) is required to determine the status of the peripheral device.
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