| 摘要 |
A redundancy control circuit includes a redundancy decoder and a decoder killer circuit. The redundancy decoder includes a plurality of fuse circuits corresponding to a plurality of determination signals which are previously activated, and each of the plurality of fuse circuits contains a plurality of fuse sections, and each of the fuse sections contains a fuse. The decoder killer circuit generates a killer signal when at least one of the plurality of determination signals is active, and the killer signal is outputted to an external unit in a first check mode. One of the plurality of fuse circuits is selected based on a first control signal and a first address bits of a first address in the first check mode, and the determination signals corresponding to the non-selected fuse circuits are inactivated. A specific one of the plurality of fuse sections of the selected fuse circuit inactivates the determination signal corresponding to the selected fuse circuit based on whether the fuse of the specific fuse section is cut in the first check mode, and each of the plurality of fuse sections of the selected fuse circuit other than the specific fuse section does not inactivate the determination signal.
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