发明名称 System for testing integrated circuit devices
摘要 A voltage generating circuit for generating internal voltage for a packaged integrated circuit memory device, is controllable to provide incremental adjustments in the voltage for testing of the memory device. The voltage generating circuit permits internally generated voltages of the memory device, such as the substrate voltage Vbb, the DVC2 voltage, and the pumped voltage Vccp, to be controlled externally through the application of test signals via the conventional test function, in performing standard device tests such as the static refresh test, logic 1s and 0s margin testing, and the like for packaged memory devices. Also, programmable circuits including programmable logic devices, such as anti-fuses, are provided that are programmable to maintain the voltage at a magnitude to which it is adjusted.
申请公布号 US2004201399(A1) 申请公布日期 2004.10.14
申请号 US20040835945 申请日期 2004.04.30
申请人 MICRON TECHNOLOGY, INC. 发明人 SHER JOSEPH C.;SIEK DAVID D.;VO HUY THANH;HEEL NICHOLAS VAN;WONG VICTOR;ZHENG HUA
分类号 G01R31/26;G01R31/30;G11C5/14;G11C29/02;G11C29/12;(IPC1-7):G01R31/26 主分类号 G01R31/26
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