发明名称 |
Stacked module systems and methods |
摘要 |
The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the contacts of the lower CSP will be compressed before flex circuitry is attached to a combination of the CSP and a form standard to create lower profile contacts between CSP and the flex circuitry.
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申请公布号 |
US2004201091(A1) |
申请公布日期 |
2004.10.14 |
申请号 |
US20040836855 |
申请日期 |
2004.04.30 |
申请人 |
STAKTEK GROUP, L.P. |
发明人 |
PARTRIDGE JULIAN;WEHRLY JAMES DOUGLAS |
分类号 |
H01L21/44;H01L23/13;H01L23/31;H01L23/498;H01L23/538;H01L25/10;H05K1/14;H05K1/18;H05K3/36;(IPC1-7):H01L21/44 |
主分类号 |
H01L21/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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