| 摘要 |
PROBLEM TO BE SOLVED: To reduce power consumption caused by a bus termination of a DDR (double data rate) SDRAM. SOLUTION: This memory controller controls the DDR SDRAM (Double Data Rate Synchronous DRAM) having a power saving function. The memory controller, wherein a buffer that is switchable to a high impedance state is used for an output buffer corresponding to a dedicated signal output terminal to the DDR SDRA, is provided with a power saving control means which shifts the DDR SDRAM to a power saving mode based on the power saving function on the basis of the prescribed condition and switches the buffer to a high impedance state when the DDR SDRAM is shifted to the power saving mode. COPYRIGHT: (C)2005,JPO&NCIPI
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