PROGRAMMABLE LOGIC DEVICE

摘要

There is provided a programmable logic device capable of performing optimal designing by changing the number of input lines between the logic function memories and the number of rails and suppressing the memory capacity to a minimum value according to the target logic function. The logic function memories (4) are successively connected in series and store LUT. An input variable is input to each of the logic function memories (4) from an externa l input line. Between two logic function memories (4), according to the connection information stored in a connection memory (6), a connection circu it (5) connects an output line or an external input line of the logical functio n memory (4) of a former stage to an input line of the logical function memory (4) of a latter stage. By rewriting the connection information in accordance with the target logic function, it is possible to reconstruct the connection circuit and change the number of input lines and the number of rails. It is possible to optimize the ratio of the number of rails against the number of the input lines in accordance with the logic function and suppress the memor y capacity to a minimum value.