发明名称 LEVEL SHIFT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level shift circuit immune to noise which reduces increase in elements and the delay. SOLUTION: The level shift circuit comprises two p-channel MOS transistors 5, 6 with their sources connected to a high voltage power source, the gate of a first n-channel MOS transistor 3 is connected to an output signal of a low voltage power source working circuit, the drain of the first n-channel MOS transistor is connected to the gate of the second p-channel MOS transistor 6 and the drain of the first p-channel MOS transistor 5, the gate of a second n-channel MOS transistor 40 is connected to an input signal to the low voltage power source working circuit, the drain of the second n-channel MOS transistor 40 is connected to the gate of the first p-channel MOS transistor 5 and the drain of the second p-channel MOS transistor 6, and the threshold voltage of the second n-channel MOS transistor 40 is set to the same as that of a transistor of a low voltage power source. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004289329(A) 申请公布日期 2004.10.14
申请号 JP20030076778 申请日期 2003.03.20
申请人 RICOH CO LTD 发明人 NISHIMURA KAZUYA
分类号 H03K19/0185;(IPC1-7):H03K19/018 主分类号 H03K19/0185
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