DATA TRANSMITTER, DATA TRANSMITTING SYSTEM, AND TRANSMISSION SPEED CONVERTING METHOD

摘要

A data transmitter flexibly adapted to various frame structures and capable of stable transmission speed conversion. In a data transmitter (20) for receiving a transmission frame through a transmission line (2), main signal data in a received signal is written in a FIFO speed conversion memory (21) in synchronism with a synchronous clock extracted from the received signal through the transmission line (2) and read in synchronism with a synchronous clock from a clock generating circuit (23) to realize asynchronous transmission speed conversion, a memory remaining capacity monitor circuit (22) output a detection signal when the remaining capacity of a speed conversion memory (21) exceeds a predetermined upper limit and falls below a predetermined lower limit, and a frequency control circuit (24) controls the output frequency of the clock generator circuit (23) according to the detection signals. Thus, if the amount of received main signal data varies, the amount of data transmitted through the transmission line (3) is adjusted depending on the varying amount of received main signal data.