| 摘要 |
PROBLEM TO BE SOLVED: To effectively prevent a hump characteristic while suppressing increase in element area and gate capacity. SOLUTION: The semiconductor device has an element isolating and insulating layer 2, a semiconductor surface region 1A in the periphery of the element isolating and insulating layer 2, and a gate electrode 4 which is formed over the semiconductor surface region 1A via an insulating film with both ends in one direction overlapped over the element isolating and insulating layer 2. On the respective sides of both ends of the gate electrode 4, a first source and drain region 5 formed of a first conductivity type semiconductor, a second conductivity type first semiconductor region located on the lower side of the gate electrode 4, the second conductivity type second semiconductor region 1A<SB>-2</SB>where the gate electrode 4 is not formed on the upper side thereof, the second conductivity type third semiconductor region located on the lower side of a gate electrode 4B, and a second source and drain region 6 formed of the first conductivity type semiconductor are located in this order along the boundary of the element isolating and insulating layer 2. COPYRIGHT: (C)2005,JPO&NCIPI
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