发明名称 PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a processor capable of performing a program in which units of reading and performance of an instruction are different and program development environment for creating the program. SOLUTION: When instruction decoders 409a to 409c decode branch instructions, upper 29 bits of a PC relative value included in the branch instructions are transmitted to a host PC arithmetic unit 411 and lower three bits of the PC relative value are transmitted to a subordinate PC arithmetic unit 405. The subordinate PC arithmetic unit 405 adds or subtracts the current value of a subordinate PC 404 and values of the lower three bits of the PC relative value and transmits operation results to the subordinate PC 404 as update values. The host PC arithmetic unit 411 adds or subtracts the current value of the host PC 403, values of the upper 29 bits of the PC relative value and carry number from the subordinate PC arithmetic unit 405 in some cases and transmits operation results to the host PC 403 as the update values. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004288223(A) 申请公布日期 2004.10.14
申请号 JP20040210765 申请日期 2004.07.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAYAMA SHUICHI;OGAWA HAJIME;KAWAGUCHI KENICHI;HIGAKI NOBUO;KOTANI KENSUKE;TANAKA TETSUYA;MIYAJI SHINYA;HEIJI TAKEHITO
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
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