| 摘要 |
In one embodiment of the present invention, a memory controller is provided that includes both a first processor and a second processor. If a memory device controlled by the controller indicates to the controller that an error condition exists in the device, either the first processor or the second processor is selected to handle the error condition. If the first processor is selected to handle the error condition, the first processor handles the error condition according to one or more statically preprogrammed error handling routines. Conversely, if the second processor is selected to handle the error condition, the second processor handles the error condition according to one or more dynamically programmable error handling routines.
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