DRAM HAVING LOW POWER CONSUMPTION FUNCTION, IN WHICH THE CAPACITANCE OF A BIT LINE PAIR IS REDUCED

摘要

PURPOSE: A DRAM having a low power consumption function is provided to reduce an operation current of a memory cell array by reducing capacitance of a bit line pair. CONSTITUTION: The DRAM includes a memory cell array(20), and a plurality of word lines(21) connected to rows or columns of the memory cell array. A plurality of bit line pairs(22) cross the plurality of word lines vertically and are connected to the memory cell array to transfer data. A sense amplifier(23) senses and amplifies a potential difference variation of the bit line pair. And a switch(24) is comprised in the bit line pair.