发明名称 MULTILAYER WIRING BOARD AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring board which has a high reliability and can be increased in density, and to provide its manufacturing method. SOLUTION: In the via-connection type multilayer wiring board wherein projecting conductive bumps 26 pierce through an interlayer insulator 24 and 25 to make connection among wiring pattern layers 21, 22, and 23, the projecting conductive bumps 26 have such a structure as to have at least one collar-like projecting portion 26a on the peripheral surface, with the collar-like projecting portion 26a in an engaged state with the interlayer insulator 24 and 25 and becoming an integral part of it. As a means of forming the collar-like projecting portion on the peripheral surface, a group of conductive bumps are formed by screen printing, and then a first insulator layer which is thinner than a height of the bumps is positioned and stacked on the bump-formed surface. By pressurizing the bumps in the stacking direction, the bumps are embedded through the insulator and, at the same time, are exposed. On the exposed top surfaces of the bumps, another conductive bumps are printed to be laid on top of the formerly formed conductive bumps. On the bump-formed surface, an insulator layer thinner than a height of the bumps is positioned and stacked. Then, the bumps are pressurized to be embedded through the insulator. This process is repeated to complete the conductive bumps having the collar-like projecting portion formed on the peripheral surface. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004281668(A) 申请公布日期 2004.10.07
申请号 JP20030070219 申请日期 2003.03.14
申请人 YAMAICHI ELECTRONICS CO LTD 发明人 OSHIRO HIROYASU
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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