发明名称 PROCESSOR FOR PERFORMING ARITHMETIC OPERATIONS IN COMPOSITE OPERANDS
摘要 The present invention relates to a processor and, more particularly, a truly flexible and versatile Configurable Galois Field Processor for applications which require operations over GF(2<pq>). Embodiments of the present invention have a unique configuration structure allows them to operate in either Single Instruction Multiple Data Mode (SIMD) (.i.e. p GF(2<q>) operations) or Single Instruction Single Data Mode (SISD) (i.e. one GF(2<m>) operation, where m <= p.q.). The choice of p and q is determined by the type of application intended and the level. of performance required. Accordingly, the same realised processor can be programmed for both forward error correction (Reed Solomon Codes, BCH codes) and Cryptography (Advanced Encryption Standard Lirid Elliptic Curve Cryptography) under various performance constraints. The properties of embodiments of processor can also be adapted for use in implementing DSP algorithms over Galois Fields (such as Transforms and adaptive filters). The dual mode design of the GF processor ensures a very high performance regardless of the type of applications.
申请公布号 WO03107177(A3) 申请公布日期 2004.10.07
申请号 WO2003GB02481 申请日期 2003.06.11
申请人 THE UNIVERSITY OF SHEFFIELD;BENAISSA, MOHAMMED 发明人 BENAISSA, MOHAMMED
分类号 G06F7/57;G06F7/72;G06F9/30;G06F9/302;G06F9/38;G06F17/10 主分类号 G06F7/57
代理机构 代理人
主权项
地址